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<Paper uid="H91-1098">
  <Title>REAL-TIME SPEECH RECOGNITION SYSTEM</Title>
  <Section position="1" start_page="0" end_page="0" type="metho">
    <SectionTitle>
REAL-TIME SPEECH RECOGNITION SYSTEM
Hy Murveit and Mitchel Weintraub
SRI International
</SectionTitle>
    <Paragraph position="0"/>
  </Section>
  <Section position="2" start_page="0" end_page="0" type="metho">
    <SectionTitle>
PROJECT GOALS
</SectionTitle>
    <Paragraph position="0"> SRI and U.C.Berkeley are developing hardware for a real-time implementation of spoken language systems (SLS). Our goal is to develop fast speech recognition algorithms and supporting hardware capable of recognizing continuous speech from a bigram or trigram based 20,000 word vocabulary or a 1,000 to 5,000 word SLS system.</Paragraph>
  </Section>
  <Section position="3" start_page="0" end_page="0" type="metho">
    <SectionTitle>
RECENT RESULTS
</SectionTitle>
    <Paragraph position="0"> SRI and U.C. Berkeley's recent accomplishments on this project include: Eight special-purpose IC's were designed, fabricated and  Developed software to support the hardware effort. This includes the following software modules: simulation, system initialization, control program coordinating different hardware components, and the grammar computation on the SKY Challenger dual-processor TMS32030.</Paragraph>
    <Paragraph position="1"> Ported current noise-robust software algorithms (from Symbolics Lisp Machine) to run on a Sun Sparcstation in C. Ported this C implementation to a Banshee TMS32030 to run in real-time.</Paragraph>
  </Section>
  <Section position="4" start_page="0" end_page="424" type="metho">
    <SectionTitle>
PLANS FOR THE COMING YEAR
</SectionTitle>
    <Paragraph position="0"> Complete the construction of the current hardware design, and software tools to support this architecture.</Paragraph>
    <Paragraph position="1"> Design a multiple-processor TMS320C30 board with a high I/O bandwidth to interface with the special-purpose HMMboard, and an interface to the MTU A/D box to compute the front-end VQ values.</Paragraph>
    <Paragraph position="2"> Develop a large vocabulary recognizer to fully use the computational capabilities of this design.</Paragraph>
    <Paragraph position="3"> Implement multiple types of grammars using this hardware. Use the real=time hardware for collecting data about man-machine speech interactions.</Paragraph>
    <Paragraph position="4"> Integrate the real-time recognizer into our research trainer to shorten the development cycle for corrective-training systelns. null Evaluate the current architecture to determine the computational and algorithmic bottlenecks.</Paragraph>
    <Paragraph position="5"> Repficate the system and port to a DARPA and NASA site.</Paragraph>
  </Section>
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