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<Paper uid="P84-1032">
  <Title>CONCURRENT PARSING IN PROGRAMMABLE LOGIC ARRAY (PLA-) NETS PROBLEMS AND PROPOSALS</Title>
  <Section position="1" start_page="0" end_page="0" type="abstr">
    <SectionTitle>
CONCURRENT PARSING IN PROGRAMMABLE LOGIC ARRAY (PLA-) NETS
PROBLEMS AND PROPOSALS
</SectionTitle>
    <Paragraph position="0"/>
  </Section>
  <Section position="2" start_page="0" end_page="152" type="abstr">
    <SectionTitle>
ABSTRACT
</SectionTitle>
    <Paragraph position="0"> This contribution attempts a conceptual and practical introduction into the principles of wiring or constructing special machines for language processing tasks instead of programming a universal machine. Construction would in principle provide higher descriptive adequacy in computationally based linguistics. After all, our heads do not apply programs on stored symbol arrays but are appropriately wired for understanding or producing language.</Paragraph>
    <Paragraph position="1"> Introductor~ Remarks i. For me, computational linguistics is not primarily a technical discipline implementing performance processes for independently defined formal structures of linguistic competence.</Paragraph>
    <Paragraph position="2"> Computational linguistics should be a foundational discipline: It should be related to process-oriented linguistics as the theory of logical calculi is to formal linguistics (e.g. generative linguistics, Montague-grammars etc.).</Paragraph>
    <Paragraph position="3"> 2. As it stands, computational linguistics does not yet meet the requirements for a foundational discipline. Searle's arguments against the claims of artificial intelligence apply fully to computational linguistics: Programmed solutions of tasks may execute the task satisfactorily without giving a model of its execution in the organism. Our intentional linguistic acts are caused by and realized in complicated concurrent processes occcurring in networks of neurons and are experienced as spontaneous. This also applies to special cases such as the recognition of syntactic structure (parsing). These processes are not controlled and executed by central processor units.</Paragraph>
    <Paragraph position="4">  3. Computational linguistics must meet the  challenge to satisfy the double criterion of descriptive adequacy: Adequacy in the description of what human beings do (e.g. parsing) and adequacy in the description of ho__~w they do it (namely by spontaneous concurrent processes corresponding to unconscious intuitive understanding). It must try to meet the challenge to provide the foundations for a descriptively and explanatorily adequate process-oriented linguistic, even when it is clear that the presently available conceptual means for describing complicated concurrent processes mainly the elements of computer architecture are far less understood than programming theory and programming technique.</Paragraph>
    <Paragraph position="5">  4. Note: It does not stand to question that there is any problem which, in principle, could not be solved by programming. It is simply the case that almost all solutions are descriptively inadequate for representing and understanding what goes on in human beings even where they provide an adequate representation of input - output relations - and would thus pass Turing's test.</Paragraph>
    <Paragraph position="6"> 5. In my opinion, the main features to be realized in more adequate computational systems are - concurrency of localized operations (instead of centrally controlled sequential processes), and - signal processing (instead of symbol manipu null lation).</Paragraph>
    <Paragraph position="7"> These features cannot be represented by a program on an ordinary von Neumann machine since this type of machine is by definition a sequential,centrally controlled symbol manipulator. This does not exclude that programs may simulate concurrent processes. For instance, programs for testing gate array designs are of this kind. But simulating programs must clearly separate the features they simulate from the features which are only specific for their sequential operation.</Paragraph>
    <Paragraph position="8"> Electronic worksheet programs (in particular those used for planning and testing of gate arrays) are appropriate simulators of this type since their display on the monitor shows the network and signal flow whereas the specifics of program execut/on are concealed from the user.</Paragraph>
    <Paragraph position="9"> 6. How should computational linguistics be developed to meet the challenge? I think that the general method has already been specified by yon Neumann and Burks in their attempt to compare behavior and structure in computers and brains in terms of cellular automata. They have shown in this context that we have always two alternatives: Solutions for tasks can be realized by programs to be executed on an universal centrally controlled (von Neumann) machine, or they can be realized by constructing a machine. Since ordinary - i.e. non-cellular-von-Neumann machines are sequential, realization of concurrent processes can only be approached by constructing (or describing the construction of such a system, e.g. the brain).</Paragraph>
    <Section position="1" start_page="150" end_page="152" type="sub_section">
      <SectionTitle>
My Approach
</SectionTitle>
      <Paragraph position="0"> 7. In view of this, I have developed theoretical net-linguistics on the basis of neurological insights. My primary intention was to gain insights into the principles of construction and functionin~ (or structure and behavior) more than to arrive at a very detailed descriptive neurological adequacy (as e.g. in H. Gigley's approach, cp. her contribution on this conference).</Paragraph>
      <Paragraph position="1"> 8. The method which to me seemed the most fruitful one for principled analysis is the one applied in systematic architecture for processor construction. In setting up idealized architectures we should proceed in steps: - select appropriate 9~erationalprimitives, - build basic network modules and define their properties - construct complex networks from modules showing a behavior which is typical for the field to be described.</Paragraph>
      <Paragraph position="2"> A possible choice is the following: - take logical operators of digital switching networks as primitives (and show how they are related to models of neurons), - take AND-planes and OR-planes (the constituents of progralmmable array logic-PLA) together with certain simple configurations such as shift-registers, - show how linguistic processes (such as generators and parsers for CF grammars) could be defined as a combination of basic modules.</Paragraph>
      <Paragraph position="3"> 9. The method is described and applied in Mead/ Conway (1980). They show how logical operators can be realized. Their combination into a combinational logic module presents three types of design problems (cp. ibid. p. 77), the first two being simple, the third being related to our problem: &amp;quot;a complex function must be implemented for which no direct mapping into a regular structure is known&amp;quot; (ibid. p. 79). &amp;quot;Fortunately, there is a way to map irregular combinational functions onto regular structures, using the progra/mnable logic array (PLA) ... This technique of implementing combinational functions has a great advantage: functions may be significantly changed without requiring major changes in either the design or layout of the PLA structure. \[Figure 13 illustrates the overall structure of a PLA. The diagram includes the input and output registers, in order to show how easily these are integrated into the PLA design. The inputs stored during \[clocksignal\] ~l in the input register are run vertically through a matrix of circuit elements called the AND plane. The AND plane generates specific logic combinations of the inputs. The outputs of the AND plane leave at right angles to its input and run horizontally through another matrix called the OR plane. The outputs of the OR plane then run vertically and are stored in the output register during \[clocksignal\] ~2&amp;quot; (ibid. p. 80).</Paragraph>
      <Paragraph position="5"> &amp;quot;There is a very straightforward way to implement finite state machines in integrated systems: we use the PLA form of combinational logic and feedback some of the outputs to inputs ... The circuit's structure is topologically regular, has a reasonable topological interface as a subsystem, and is of a shape and size which are functions of the appropriate parameters. The function of this circuit is determined by the 'programming' of its PLA logic&amp;quot; (ibid. p. 84).</Paragraph>
      <Paragraph position="6"> iO. As a first example of the application of these methods, it has been shown in Schnelle (forthcoming) how a complex PLA network composed from AND-planes, OR-planes, ordinary registers, and shift registers can be derived by a general and formal method from any CF-grammar, such that the network generates a sequence of control signals,triggering the production of a corresponding terminal symbol (or of a string of terminal symbols). The structure derived is a set of units, one for each non-terminal occurring in the grammar and one for each terminal symbol. Before presenting the network realizing simple units of this type, we give an informal indication of its functioning. A unit for a nonterminal symbol occurring to the left of an arrow in the CF gra~muar to be realized which allows m rule alternatives and occurs at n places to the right of the rule arrow has the form of figure 2a. A unit for a terminal symbol - say &amp;quot;A&amp;quot; - occurring at n places to the right of an arrow has the form of figure 2b. The &amp;quot;STORE&amp;quot; - units can be realized by ORplanes, the &amp;quot;READ&amp;quot;-units by AND-planes. The flipflops (FF) are simple register units and the shift register is a simple PLA network of well known structure. The reader should note that the notions such as &amp;quot;store&amp;quot;, &amp;quot;read&amp;quot; and &amp;quot;address&amp;quot; are metaphorical and chosen only to indicate the functioning: The boxes are no_~t subprograms or rules but circuits. There are neither addresses nor acts of selection,nor storing or reading of symbols. null</Paragraph>
      <Paragraph position="8"> more complicated cases the signal flow cannot be properly organized by a schematic adaptation of the system realized for production. I am therefore planning to investigate realizations of concurrent signal flows for bottom-up processors. At the moment I do not yet have a general method for specifying bottom-up processors in terms of networks. null 12. In order to illustrate concurrent information flow during parsing let me present two simple examples. The first example provides details by an extremely simple wiring diagram of figure 3, which realizes the &amp;quot;gran~mar&amp;quot; S + ;~,  I .... i;+ , &amp;quot; ....... ; 'c:&amp;quot;;:'+r t:,T. .... ............ t ..... * ..... 1~!r,~-I l~Inlor nctlv~tlnn x ~ ~ x # p(.js1+r. 21++ C.enorml rn,m o\[ +~ .,stPS remll~(n%l . L..mI.*~L ~yml~-~l o( th. &lt;Irm~r (tile .~ymt*)! &amp;quot;~&amp;quot; (, thl, ~a~q)  ii. The complex networks definable by a general method from CF-granunar specifications, as shown in Schnelle (forthcoming) can be easily extended into a predictive top-to-bottom, left-to-right parser such that the prediction paths are generated in parallel by concurrent signal flows (as will be illustrated below). At the realPSzations of a terminal symbol a TEST PREDICTION &amp;quot;a&amp;quot; is included, as indicated in figure 2b. However, a detailed analysis of this system shows that in rl~ur~ 3 It illustrates the general type of wiring where the hyphenated units must be multiplied into n storage units, whenever there are n inputs. The box for PRINT &amp;quot;a&amp;quot; or TEST PREDICTION &amp;quot;a&amp;quot; shows a multiplicity of 2 storage units marked 3 and 4 for the case of two input and output lines. For the details of PLA construction of such networks the reader is referred to Schnelle (forthcoming).</Paragraph>
      <Paragraph position="9"> 13. We shall now illustrate the signal flow occurring PSn a PLA realization of the grammar: S + Ac, S + aD, A / a, A + ab, D + bd, D + d. A grammatically perspicuous topology of the network is shown in figure 4. The double lines are wires, the boxes have an internal structure as explained above. For a parse of the string abd the wiring realizes the following concurrent signal flow on  the wires corresponding to the numbers indicated in figure 4.</Paragraph>
      <Paragraph position="10">  Since the only possible generation derivable from this parse information is $1, DI, the structure is \[a\[bd\]D\] S whereas the informations AI and A2 remain unused, i.e. non confirmed, by the complete parse.</Paragraph>
      <Paragraph position="11"> 14. We have presented only very simple illustrations of concurrent information flow and their realizations in integrated circuits. Much more research will be necessary. Our contribution tried to illustrate (together with Schnelle forthcoming) how current VLSI design methods - and simulation programs used in the context of such designs - could be applied. It is hoped that several years of experience with designs of such types may lead to fruitful foundational concepts for process-oriented linguistics, which solves its tasks by constructing descriptively adequate special machines instead of programming universal yon Neumann machines.</Paragraph>
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